Latching Load Switch Simulation



Companies want to design seamless experiences and sometimes this requires adding some extra circuitry magic. In this tutorial, I shared my design process as I went from requirement to simulation.

Source

You can get the raw source on the Circuit Dojo Github.

The Problem

Imagine a battery charger, not to dissimilar from the Apple Airpod charger. Now, whenever the user opens the lid, LEDs light up indicating the power level of the two “external batteries.”

The trick here is that:

  1. this functionality should work if any of the batteries (internal or external) has a charge and independent of being connection to external power (USB)
  2. this circuit must not draw any power beyond the on time of the LEDs (say 2-5 seconds)
  3. there is only one extra GPIO available on the on-board micro-controller

Seems simple enough right? Let us begin.

Map the architecture

So, with the description and the tools I already had I started mapping out what I thought the architecture looked like but also how this additional circuitry could integrate into it. In this first part, I drew out all the logical blocks I know would exist in such a circuit: Charger(x2) and/or PMIC, USB connection, micro-controller, LEDs. Then I thought, how will this all work depending on the function of the lid? (And use no power to boot)

The overall architecture of how I imaged things would go together.

My gut instinct went right to the following:

  1. A mechanical switch
  2. A reed switch

I also thought about Hall effect but it requires some quiescent current to run. If we want 0 current draw this is definitely not a solution.

Try out a few circuits in my head

The hardest part of this type of analog design process is understanding the state at ALL the nodes of the circuit. Even though the final circuit that I decided to use is deceptively simple, it’s important to know what’s happening at one circuit to know how it affects the other side!

One thing is for sure, that the use of some low forward voltage Schottky diodes would be used to tie the power supplies together. So this circuit would work whether or not USB is inserted.

Collecting power from all three locations (removable battery 1, removable battery 2, battery 3)

A few circuits here and there but I was still coming up with nothing. How can a single switch set and reverse a state?

Trying to imagine how one switch can change state.

Another imaginative effort.

Then my mind started going toward a circuit that I had wanted to implement a while ago. It was a latching switch that would turn on and off a load without any additional components or logic. Much like a timer in C code, I wanted a one shot that would trigger once and once only when activated.

So my search for inspiration began and soon enough I found myself at a site full of monostable vibrators but one in particular caught my attention. It was a modified load switch architecture:

The original circuit.

(Specifically from here)

I thought about how I could integrated it with a single GPIO. I already knew early in the process that the GPIO was to be used to control the latching functionality. In this case I was thinking it’d likely just be connected to one NMOS FET.

So, I popped open PSpice and added all my components. I think I spent more time figuring out how to use the correct PSPICE components than assembling everything together. I spent some trial and error how to get the switching part right to show the different states but I ended up with this:

My first attempt at putting everything in PSpice

Whereas the VDC is the OR’d power sources via a 3 anode common cathode configuration. I found some MOSFETs that typically fit the bill for embedded applications I’ve worked on in the past. Depending on the load, M3 could be a higher rated FET (only 100mA or so).

Testing

My first step in testing was to get the circuit functional and as expected. Originally, I didn’t have a load on the drain of the PFET so the software had it floating up at the beginning of simulation. I added barrier diode (D1) to help if the load a capacitive one. Likely in the real circuit this would be less of an issue.

I played with the values of R5, R6 C2, R12 to see how they affected the circuit and to get my mind about how they interacted at each node. Only so much capacitance at C2 would affect the highest voltage seen at M2’s gate. And tweaking how R5/R6/R12 would help maintain state by keeping M2 above VTH or below.

In the case of this circuit, the gate of M2 was the most important deciding factor on how this whole circuit operated. VTH is critical here for the circuit to maintain/change state.

Considerations during testing

One of my main considerations was testing the full sweep of input voltages from dead to the highest voltage the circuit may see. (In this case, likely 5V). This requires a bit more real life testing, but I went from about 4.4V down to 3V in my original test. Above 4.4 may require a bit more trickery or just putting a standard diode with a forward voltage of 0.7V in series to keep the operational voltage of the circuit within a useable range.

Another concern would be for temperature. It’s always a good idea to test at extremes to make sure the circuitry doesn’t do anything unexpected. I would gather that the worst case scenario would be to discharge a customers batteries unintentionally leaving them with some dead batteries.

Here’s a capture with the Vin being 4.4V. The red line is the gate at the PFET, the purple being the NFET gate, the light blue being the output/load and the green being the logic that controlled the “cover switch.”

First waveform capture. Look at those transitions!

As seen above, every time there is a rising edge on that switch the circuitry changes state and holds it until the next rising edge. Perfect.

Final integration…

The only addition to the circuity would be the NMOS fit to the gate of M2. This way, the micro-controller could shut down the circuitry after the required 5 seconds. Pulling the gate low would then cause a chain reaction to close the PFET and shut everything down.

These latching type circuits are tricky because if the resistors are not tuned sufficiently, they could potentially allow more current to flow right back to the gate and keep everything back on.

As a quick test, I added another switch and changed the timing so the voltage would drop while the switch was still enabled.

Adding a "shutdown" MOSFET.

The yellow trace is the shutdown MOSFET’s gate. The final configuration can be shown below:

Final test schematic

Finalize

Finally, I would actually take the time to build this circuit up on the bench likely using the supplies I have on hand and test it out. Test out the intended voltage range and, even throw it into the freezer for a few hours an test afterwards and then do the opposite by throwing it into the oven until crispy hot and test again. (Minus lithium batteries of course!)

Conclusion

Feel free to play with the circuit and see what you can create. Try to not involve the magic black smoke though. Leave a comment below and let us know how your experiments go!


Created: 2018-05-06 | Last Modified: 2018-08-03